1. Field of the Invention
The present invention pertains to a method of selective construction of built-up structures upon the surface of a patterned masking material used for semiconductor fabrication. One of the preferred applications for the method is in the dimensional reduction of patterned openings to provide a desired critical dimension.
2. Brief Description of the Background Art
In the field of semiconductor device fabrication, there is a constant drive to reduce the size of devices, to the point that new techniques must constantly be developed to enable the patterning of smaller feature sizes. Deep UV (DUV) photoresists have been developed which take advantage of shorter wavelengths of ultraviolet radiation to enable the patterning of smaller-dimensioned electronic and optical devices than possible with traditional, or so called I-line photoresists. Generally, the photoresist is applied over a stack of layers of various materials to be patterned in subsequent processing steps. Some of the layers in the stack can cause the reflection of imaging radiation in a manner which causes problems during exposure of the photoresist. To take advantage of the spacial resolution of the photoresist, it is necessary to use an anti-reflective coating (ARC) layer underlying the photoresist, to suppress reflection off other layers in the stack during photoresist exposure. Thus, the ARC layer enables patterning of the photoresist to provide an accurate pattern replication.
A most commonly used ARC material is titanium nitride, a number of other materials have been suggested for use in combination with DUV photoresists. For example, U.S. Pat. No. 5,441,914 issued Aug. 15, 1995 to Taft et al. describes the use of a silicon nitride anti-reflective layer, while U.S. Pat. No. 5,525,542, issued Jun. 11, 1996 to Maniar et al. discloses the use of an aluminum nitride anti-reflective layer. U.S. Pat. No. 5,539,249 of Roman et al., issued Jul. 23, 1996, describes the use of an anti-reflective layer of silicon-rich silicon nitride. U.S. Pat. No. 5,635,338 to Joshi et al., issued Jun. 3, 1997, describes a class of silicon-containing materials which display particular sensitivity in the ultraviolet and deep ultraviolet for the formation of patterns by radiation induced conversion into glassy compounds. U.S. Pat. No. 5,633,210 to Yang et al., issued May 27, 1997 discloses the use of an anti-reflective coating material selected from titanium nitride materials, silicon oxide materials, and silicon oxynitride materials.
FIG. 1 is a schematic of a cross-sectional view of an example etch stack 100 of materials to which pattern transfer is applied, the etch stack including polysilicon, wherein the etch stack includes, from bottom to top: An underlying substrate 102 which depends on the device functionality required, a dielectric layer 104 (typically silicon oxide) is used to separate polysilicon layer 106 from underlying device layers, an ARC (optional) 108 and a patterned photoresist or patterned hard mask 110. When the material used to construct mask 110 is a deep ultra violet (DUV) photoresist, an ARC 108 is used, and one of the more preferred ARCs is silicon oxynitride.
FIG. 1 illustrates a mask 110 having a pattern of lines (110a, 110b, and 110c) and spaces (112a, 112b, and 112c). The space dimension xe2x80x9cd1xe2x80x9d between lines 110a and 110b will be transferred directly to (through) ARC 108 and other underlying layers, if desired, during the etch process. In Metal Oxide Semiconductor Field Effect Transistors (MOSFETs), polysilicon xe2x80x9cpadsxe2x80x9d of various sizes in particular patterns are formed by etching into the surface of polysilicon layer 106. The desired pad size is produced by controlling the size of the openings in the patterned mask, which controls the size of the spacings surrounding the pads. At this time, photolithography enables the formation of patterns having dimensions d1 in the range of about 0.35 xcexcm. However, there is a constant demand for reduction in device size, requiring a reduction in the dimension d1, for example. Presently, the demand is for the smallest dimension of a pattern, typically referred to as the xe2x80x9ccritical dimensionxe2x80x9d or xe2x80x9cCDxe2x80x9d to be in the range of about 0.15 xcexcm.
The present invention pertains to a method for depositing built-up structures on the surface of patterned masking material used for semiconductor device fabrication. Such built-up structures are useful in achieving critical dimensions in the fabricated device. The composition of the built-up structure to be fabricated is dependant upon the plasma etchants used during etching of underlying substrates and on the composition of the substrate material directly underlying the masking material. If the composition of the built-up structure is inadequate to withstand the plasma etchants used during subsequent etch steps, there can be lateral etching and undercutting of the masking layer so that the desired critical device dimension cannot be obtained from the patterned masking layer.
Typically, polysilicon is etched using a plasma source gas which is a combination of Cl2, HBr, and optionally O2. We have developed a method for depositing built-up structures which can be used when the polysilicon plasma etchant includes HBr as a component. More recently a new plasma etchant for polysilicon has been developed which is a combination of SF6, Cl2 and N2. We have developed an alternative method for depositing built-up structures which can be used when the polysilicon plasma etchant does not include HBr as a component.
One embodiment of the method for depositing built-up structures upon a patterned mask surface includes: providing a patterned mask surface, wherein the patterned mask rests on a predetermined underlying substrate; and depositing a polymeric built-up structure over at least a portion of the patterned mask surface using a plasma formed from a source gas comprising Cl2, a compound which comprises fluorine, and an inert gas which provides physical bombardment of surfaces contacted by the plasma.
This method may be used when the polysilicon plasma etchant source gas includes HBr.
The compound which comprises fluorine preferably includes carbon. More preferably, the compound has the formula Cx Hy Fz, where x ranges from 1 to about 5; y ranges from 0 to about 11; and z ranges from 1 to about 10. The compound comprising carbon and fluorine may also contain chlorine. Some of the more preferred fluorine-comprising compounds include, by way of example and not by way of limitation, CF4, CHF3, CH2F2, CH3F, and CF3Cl.
The inert gas may be selected from the group consisting of helium, nitrogen, argon, krypton, and xenon. Preferably the inert gas is selected from the group consisting of argon, krypton and xenon.
The patterned mask may be comprised of an inorganic masking material, an organic masking material, a hydrocarbon material, or combinations thereof.
To achieve advantageous physical bombardment of the surfaces contacted by the plasma, it is frequently necessary to apply a bias to the patterned mask and underlying substrate. The amount of bias applied is preferably adequate to create a bias voltage on the surface of said mask ranging from about xe2x88x92200 V to about xe2x88x92600 V. Use of a substrate which includes silicon and oxygen as the underlying substrate beneath the patterned mask man may be helpful. An underlying substrate which comprises silicon, oxygen and nitrogen is known to work well.
When the source gas used during the polysilicon etching may cause side reactions with residues from the source gas used during the formation of the built-up layer, it may be advisable to modify the source gas used during the formation of the built-up layer. For example, when HBr is not a component of the polysilicon etch source gas, the preferred method for depositing built-up structures on a patterned mask surface includes: providing a patterned mask surface which rests on a predetermined underlying substrate; and, depositing a polymeric built-up structure over at least a portion of the patterned mask surface using a plasma formed from a source gas comprising Cl2, NH3 and an inert gas which provides physical bombardment of surfaces contacted by said plasma. The predetermined substrate underlying the patterned mask preferably includes silicon and oxygen. An underlying substrate comprising silicon, oxygen, and nitrogen has been determined to work well.
The inert gas may be selected from the group consisting of helium, nitrogen, argon, krypton, and xenon. Preferably the inert gas is selected from the group consisting of argon, krypton and xenon.
The patterned mask may be comprised of an inorganic masking material, an organic masking material, a hydrocarbon material, or combinations thereof.
To achieve advantageous physical bombardment of the surfaces contacted by the plasma, it is frequently helpful to apply a bias to the patterned mask and underlying substrate. The amount of bias applied preferably is adequate to create a bias voltage on the surface of said mask ranging from about xe2x88x92200 V to about xe2x88x92600 V.